The INMP441 microphones are connected to the SPORT data input pins of the ADSP-BF527. The only necessary passive components in this circuit are a single 0.1 µF bypass capacitor for each INMP441 and a large pull-down resistor (100 kΩ) on the SD line to discharge it while the INMP441 output drivers are tristated. Place the bypass capacitors as close to the INMP441 VDD pin (Pin 7) as possible.
Supply the microphones’ VDD from the same source as the 2.25 V to 3.3 V VDDEXT of the ADSP-BF527. Even though the INMP441 can operate with VDD between 1.8 V and 3.3 V, VDDEXT on the ADSP-BF527 must be a minimum of 2.25 V. There are three signals that must be connected between the INMP441 and ADSP-BF527 for the I2S data stream: frame clock, bitclock, and data. The ADSP-BF527 is the system clock master and generates the two I2S clocks.
This circuit demonstrates the microphones connected to a single data input on the SPORT0 of the Blackfin. Each of the two SPORTs of the ADSP-BF527 has two sets of data receive pins that enable up to eight channels of I2S audio in. Table 1 shows the connections when using the serial SPORT0 of the ADSP-BF527.